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Freescale Semiconductor /MK21D5WS /PTC /PSOR

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Interpret as PSOR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PTSO

PTSO=0

Description

Port Set Output Register

Fields

PTSO

Port Set Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to logic 1.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data